From 8e939f1035fee38b6b78e6b0f556f3112603d4e1 Mon Sep 17 00:00:00 2001 From: "djm@kirby.fc.hp.com" Date: Tue, 14 Jun 2005 17:57:25 +0000 Subject: [PATCH] bitkeeper revision 1.1709.1.7 (42af1a85T412eQfXEME3Z3XLDYOmWg) XEN/VTI utilizes a PMT table to describe physical->machine mapping info, instead of 3 level page tables from Linux. Attached patch adds some necessary macro/interface/definitions about that structure. Some stuff is added to public directory, because control panel needs to use those info to construct domain. Signed-off-by Kevin Tian --- xen/arch/ia64/xenmem.c | 2 +- xen/include/asm-ia64/domain.h | 11 ++++++++++- xen/include/asm-ia64/mm.h | 27 +++++++++++++++++++++++++-- xen/include/asm-ia64/vmx_vpd.h | 1 + xen/include/public/arch-ia64.h | 26 ++++++++++++++++++++++++++ 5 files changed, 63 insertions(+), 4 deletions(-) diff --git a/xen/arch/ia64/xenmem.c b/xen/arch/ia64/xenmem.c index 3a749840a0..088611b22a 100644 --- a/xen/arch/ia64/xenmem.c +++ b/xen/arch/ia64/xenmem.c @@ -52,7 +52,7 @@ paging_init (void) panic("Not enough memory to bootstrap Xen.\n"); printk("machine to physical table: 0x%lx\n", (u64)mpt_table); - memset(mpt_table, 0x55, mpt_table_size); + memset(mpt_table, INVALID_M2P_ENTRY, mpt_table_size); /* Any more setup here? On VMX enabled platform, * there's no need to keep guest linear pg table, diff --git a/xen/include/asm-ia64/domain.h b/xen/include/asm-ia64/domain.h index 83d2542a73..a4caf018b6 100644 --- a/xen/include/asm-ia64/domain.h +++ b/xen/include/asm-ia64/domain.h @@ -6,6 +6,7 @@ #include #include #include +#include #endif // CONFIG_VTI #include @@ -33,7 +34,15 @@ struct arch_domain { int imp_va_msb; ia64_rr emul_phy_rr0; ia64_rr emul_phy_rr4; - u64 *pmt; /* physical to machine table */ + unsigned long *pmt; /* physical to machine table */ + /* + * max_pfn is the maximum page frame in guest physical space, including + * inter-middle I/O ranges and memory holes. This is different with + * max_pages in domain struct, which indicates maximum memory size + */ + unsigned long max_pfn; + unsigned int section_nr; + mm_section_t *sections; /* Describe memory hole except for Dom0 */ #endif //CONFIG_VTI u64 xen_vastart; u64 xen_vaend; diff --git a/xen/include/asm-ia64/mm.h b/xen/include/asm-ia64/mm.h index c6d127acdb..c84a7c781a 100644 --- a/xen/include/asm-ia64/mm.h +++ b/xen/include/asm-ia64/mm.h @@ -375,17 +375,40 @@ extern unsigned long *mpt_table; #undef machine_to_phys_mapping #define machine_to_phys_mapping mpt_table +#define INVALID_M2P_ENTRY (~0U) +#define VALID_M2P(_e) (!((_e) & (1U<<63))) +#define IS_INVALID_M2P_ENTRY(_e) (!VALID_M2P(_e)) /* If pmt table is provided by control pannel later, we need __get_user * here. However if it's allocated by HV, we should access it directly */ -#define phys_to_machine_mapping(d, gpfn) \ - ((d) == dom0 ? gpfn : (d)->arch.pmt[(gpfn)]) +#define phys_to_machine_mapping(d, gpfn) \ + ((d) == dom0 ? gpfn : \ + (gpfn <= d->arch.max_pfn ? (d)->arch.pmt[(gpfn)] : \ + INVALID_MFN)) #define __mfn_to_gpfn(_d, mfn) \ machine_to_phys_mapping[(mfn)] #define __gpfn_to_mfn(_d, gpfn) \ phys_to_machine_mapping((_d), (gpfn)) + +#define __gpfn_invalid(_d, gpfn) \ + (__gpfn_to_mfn((_d), (gpfn)) & GPFN_INV_MASK) + +#define __gpfn_valid(_d, gpfn) !__gpfn_invalid(_d, gpfn) + +/* Return I/O type if trye */ +#define __gpfn_is_io(_d, gpfn) \ + (__gpfn_valid(_d, gpfn) ? \ + (__gpfn_to_mfn((_d), (gpfn)) & GPFN_IO_MASK) : 0) + +#define __gpfn_is_mem(_d, gpfn) \ + (__gpfn_valid(_d, gpfn) ? \ + ((__gpfn_to_mfn((_d), (gpfn)) & GPFN_IO_MASK) == GPFN_MEM) : 0) + + +#define __gpa_to_mpa(_d, gpa) \ + ((__gpfn_to_mfn((_d),(gpa)>>PAGE_SHIFT)< #include +#include #define VPD_SHIFT 17 /* 128K requirement */ #define VPD_SIZE (1 << VPD_SHIFT) diff --git a/xen/include/public/arch-ia64.h b/xen/include/public/arch-ia64.h index 6f0c499531..53a4101641 100644 --- a/xen/include/public/arch-ia64.h +++ b/xen/include/public/arch-ia64.h @@ -19,6 +19,32 @@ /* NB. Both the following are 64 bits each. */ typedef unsigned long memory_t; /* Full-sized pointer/address/memory-size. */ +#define MAX_NR_SECTION 32 // at most 32 memory holes +typedef struct { + unsigned long start; /* start of memory hole */ + unsigned long end; /* end of memory hole */ +} mm_section_t; + +typedef struct { + unsigned long mfn : 56; + unsigned long type: 8; +} pmt_entry_t; + +#define GPFN_MEM (0UL << 56) /* Guest pfn is normal mem */ +#define GPFN_FRAME_BUFFER (1UL << 56) /* VGA framebuffer */ +#define GPFN_LOW_MMIO (2UL << 56) /* Low MMIO range */ +#define GPFN_PIB (3UL << 56) /* PIB base */ +#define GPFN_IOSAPIC (4UL << 56) /* IOSAPIC base */ +#define GPFN_LEGACY_IO (5UL << 56) /* Legacy I/O base */ +#define GPFN_GFW (6UL << 56) /* Guest Firmware */ +#define GPFN_HIGH_MMIO (7UL << 56) /* High MMIO range */ + +#define GPFN_IO_MASK (7UL << 56) /* Guest pfn is I/O type */ +#define GPFN_INV_MASK (31UL << 59) /* Guest pfn is invalid */ + +#define INVALID_MFN (~0UL) + + typedef struct { } PACKED cpu_user_regs; -- 2.30.2